Arris TM501B/Serial info

Boot log

UART Initialized BOOTCR: 0x03900b11 Reset Type: 0x00000000 (Hardware) Chip CVR: 0x00120204 (Puma3 1.0) SDRAM Size: 0x01000000 TESTING SDRAM .+.+.+ SDRAM IS GOOD ARRIS Image Starter v05.01 ARRIS, Inc. (C) 2001 - 2004 Trying Flash Table A...GOOD Unzipping DOCSIS Computing CRC on zip image...GOOD Decompressing Load (LZMA)..........................................................GOOD Computing CRC on SDRAM image...GOOD Unzipping Application Computing CRC on zip image...GOOD Decompressing Load (LZMA)............................................GOOD Computing CRC on SDRAM image...GOOD DOCSIS load...GOOD App load......GOOD Running DOCSIS... PSAVE_init: copied 36 instructions to internal sram PSAVE_init: PDCR = 0x00401810 PSAVE_init: PRCR = 0x0000004e Installed MIPS exception handler CPU is Puma-3: MIPS core speed is 210000000 Hz (200 Ticks Per Second) `!MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM::~ ``!MMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMMM!:~` ~ !MMMMMMMMMMMMMMMMMMMMMMM!:` :~~ :MMMMMMMMMMMMMMMM!~ :~~~~ .:MMMMMMMMMM!:~ ~~~~~~ ..:MMMMMMM!:~` :~~~~~~~ .:MMMMMM:~` ::~~~~~~~~~ .:MMMMM:~ .!!!!!!: ~~~~ ..:MMM:~` .!!!!` ~ ..:MM:~` !!` .:M:~` AA RRRRRRR RRRRRRR III SSSSS AAAA RRRRRRRRR RRRRRRRRR III SSSSSSSSS AAAAAA RRR RRR RRR RRR III SSS SS AAA AAA RRR RRRR RRR RRRR III SSSS AAA AAA RRRRRRRRR RRRRRRRRR III SSSSSS AAAAAAAAAAAA RRR RRR RRR RRR III SSSS AAA AAA RRR RRR RRR RRR III SS SSS AA AA RRR RRR RRR RRR III SSSSSSSSS A A RRR R RRR R III SSSSS ======================= Load Info ======================= Built On: Thu Sep 30 11:16:56 EDT 2010 Built By: ccbuild Build View: TS0601110_093010_Build_Host_3_Build_1 Build System: SunOS kinison sun4u Build Name